• Important information
• New features
• Known problems
• Program corrections
• User guide corrections
• Miscellaneous
• Release history

Important information

• To avoid the space-consuming tables used for character classification (ctype.h), define the preprocessor symbol __NO_CTYPE_TABLES before the ctype.h file is included.

• The compiler now avoids the LDRD instruction with the base register in list when generating code for Cortex-M3. This is to work around the Cortex-M3 erratum 602117.

• News in EWARM 6.10.2:
  

  The --guard_calls command line option is introduced. Note, --guard_calls must always be used in applications written in EC++/C++ that need thread-safe library function calls. For more information see the Development guide.

  The --no_guard_calls command line option is removed.

  The --aeabi command line option has modified behavior: Guard calls are not used by default.
  Migration instructions from IAR C/C++ Compiler for ARM 5.x and 6.10.1 to IAR C/C++ Compiler for ARM 6.10.2:
  --aeabi (without --no_guard_calls) shall be replaced with --aeabi --guard_calls
--aeabi --no_guard_calls shall be replaced with --aeabi
  

• News in EWARM 6.20:
  

  A customer that have implemented the time() function must now rename it into __time32(). For more information see the Development guide.

• A special note on CMSIS integration:
  

  If your application source code include CMSIS header files explicitly, then you should not check the Use CMSIS check-box Project>Options...>General Options>Library Configuration>Use CMSIS. Some of the Cortex-M application examples includes CMSIS source files explicitly, do not check the said check-box in these projects.
  
  However, due to the evolution of the IAR C/C++ Compiler for ARM, older versions of CMSIS are incompatible with the current version of the compiler. One simple example of how to solve this issue is:
  a) Press F4 to bring up the erroneous source (header) file in the editor - in most cases named core_cm3.h.
  b) Right-click on the window tab of that editor window, choose File Properties....
  c) Add (or remove) any character to the file name - so the compiler won't find it any more.
  d) Modify project options: Check Project>Options...>General Options>Library Configuration>Use CMSIS.
  Steps a) to c) might need to be done for more than one file. Normally, the names of these files are core_cm0.h, core_cm3.h, core_cm4.h, core_cmFunc.h and core_cmInstr.h.
  
  For more information about CMSIS integration in the IAR Embedded Workbench for ARM, see the Development guide.

New features

• None.

Known Problems

• The C/C++ library header file time.h declares the library function mktime. When called with a negative value in the broken-down time component tm_isdst, which is part of the tm struct function parameter, mktime fails to determine whether Daylight Saving Time is active for the specified time or not.
  [EW14632]

Program Corrections

• The diagnostic messages now refer to the correct rule numbers when MISRA C 2004 is chosen.
  [EW22347]

• The underlying type of a constant expression is now evaluated as for any other expressions. This deviates from the specific constant expression rule in MISRA-C:2004 6.10.4. Both IAR Systems and the MISRA-C committe feels that this rule doesn't reflect the intention.
  [EW22373]

• Initalizing a member char array with a string literal in a class constructor no longer results in an internal error.
  [EW22503]

• The intrinsic function __REV16 is now available when compiling for Cortex-M0.
  [EW22715]

• Complement ~ of an unsigned expression is no longer optimized incorrectly when the expression contains a right shift or a bitwise and with a constant.
  [EW22725]

• C++ temporary objects needed when initializing file-scope and namespace-scope variables are now created properly.
  [EW22751]

• A signed test for less than, less equal, greater than or greater equal on an expression that is shifted immediately before the test now gives correct result.
  [EW22752]

• In EWARM 6.30.3:
  Using the __packed attribute in situations that involve template functions no longer causes an internal error.
  [EW22776]

• In EWARM 6.30.3:
  On the high optimization level, a mix of signed and unsigned values in complex array index expressions no longer causes an internal error.
  [EW22787]

• In EWARM 6.30.3:
  Passing a constant as argument to an intrinsic function that inserts a specific assembler instruction no longer causes an internal error in C++ mode.
  [EW22808]

• In EWARM 6.30.3:
  In rare cases the induction variable optimization could cause an internal error. This has been corrected.
  [EW22815]

• In EWARM 6.30.3:
  Using the multi-file compilation option --mfc with one or more zero-size source files no longer causes the compiler to terminate with an internal error.
  [EW22828]

• In EWARM 6.30.3:
  The debug information in ELF files now refers to the correct source file name when the command line option --preinclude is used.
  [EW22848]

• In EWARM 6.30.3:
  When some diagnostics (in particular, the undefined behavior warnings about unordered accesses etc) were triggered on uses of fields in a block-local anonymous struct/union variable, the compiler aborted with an internal error. This problem has been corrected.
  [EW22850]

• In EWARM 6.30.3:
  The thread-exit function now correctly deallocates the potentially allocated daylight saving time structure.
  [EW22862]

• In EWARM 6.30.3:
  An instructions inside an IT-block is no longer a candidate for dead-code removal, since removing it will leave the IT-instruction inconsistent.
  [EW22864]

User guide corrections

There are a number of new intrinsic functions which lack description in the Development guide:

__PLI
Syntax: void __PLI(void const *);
Description: Inserts a PLI instruction. This intrinsic function requires an ARMv7 architecture.

__PLD
Syntax: void __PLD(void const *);
Description: Inserts a PLD instruction. This intrinsic function requires an ARMv7 architecture.

__PLDW
Syntax: void __PLDW(void const *);
Description: Inserts a PLDW instruction. This intrinsic function requires an ARMv7 architecture with MP extensions (Cortex-A5 and Cortex-A9).

__MCR2
Syntax: void __MCR2(__ul coproc, __ul opcode_1, __ul src, __ul CRn, __ul CRm, __ul opcode_2 );
Parameters:


coproc	The coprocessor number 0..15.
opcode_1	A coprocessor-specific operation code.
src	The value to be written to the coprocessor.
CRn	The coprocessor register to write to.
CRm	An additional coprocessor register; set to zero if not used.
opcode_2	An additional coprocessor-specific operation code; set to zero if not used.

Description: Inserts a coprocessor write instruction, MCR2. A value will be written to a coprocessor register. The parameters coproc, opcode_1, CRn, CRm, and opcode_2 will be encoded in the MCR2 instruction and must therefore be constants.
This intrinsic function requires an ARMv5T architecture or higher for ARM mode, or ARMv6T2 or higher for Thumb mode.

__MRC2
Syntax: unsigned long __MRC2( __ul coproc, __ul opcode_1, __ul CRn, __ul CRm, __ul opcode_2 );
Parameters:


coproc	The coprocessor number 0..15.
opcode_1	A coprocessor-specific operation code.
CRn	The coprocessor register to read from.
CRm	An additional coprocessor register; set to zero if not used.
opcode_2	An additional coprocessor-specific operation code; set to zero if not used.

Description: Inserts a coprocessor read instruction, MRC2. Returns the value of the specified coprocessor register. The parameters coproc, opcode_1, CRn, CRm, and opcode_2 will be encoded in the MRC2 instruction and must therefore be constants.
This intrinsic function requires an ARMv5T architecture or higher for ARM mode, or ARMv6T2 or higher for Thumb mode.

Miscellaneous

• Generate workarounds for hardware problems:

  • Functional problem Core.1 in NXP device LPC2478: Incorrect update of the Abort Link register in Thumb state.
    Workaround generated with iccarm --enable_hardware_workaround=NXP_Core.1

Release history

See release history.